Method and system for shipping semiconductor wafers

ABSTRACT

According to one embodiment of the invention, an apparatus includes a plurality of coin stacks of semiconductor wafers. Each coin stack includes a plurality of semiconductor wafers separated from an adjacent wafer by a wafer separator disposed within a coin stack carrier. The apparatus also includes a shipping box having the plurality of coin stacks disposed therein such that each of the wafers in each of the coin stack carriers has a vertical orientation.

TECHNICAL FIELD OF THE INVENTION

This invention relates generally to semiconductor carriers and more particularly to a method and system for shipping semiconductor wafers.

BACKGROUND OF THE INVENTION

In shipping semiconductor wafers, the wafers are often delivered in a container filled with the wafers in a horizontally stacked configuration. The containers are sometimes referred to as coin stacks or coin stack boxes. Typically there is a gap between the perimeter of the wafers and the inside of the coin box, which allows some movement of the wafers.

Many wafers have interconnection conductor material portions (e.g., solder bumps, bond pads, post-passivation interconnects) protruding from the wafer surface. These interconnection portions are subject to being damaged when shipped in coin stack boxes due to rubbing of one wafer against the other through movement of the wafers within the coin box. Damage may result in electrical short circuits on the wafers as well as other undesirable outcomes.

Another shipping method involves placing the wafers in a container that has a plurality of vertical slots, and shipping the wafers in a vertical configuration. This approach is often costly and results in bulky containers.

SUMMARY OF THE INVENTION

According to one embodiment of the invention, an apparatus includes a plurality of coin stacks of semiconductor wafers. Each coin stack includes a plurality of semiconductor wafers separated from an adjacent wafer by a wafer separator disposed within a coin stack carrier. The apparatus also includes a shipping box having the plurality of coin stacks disposed therein such that each of the wafers in each of the coin stack carriers has a vertical orientation.

Some embodiments of the invention provide numerous technical advantages. Some embodiments may benefit from some, none, or all of these advantages. According to one embodiment a method and apparatus are provided that allow shipping of semiconductor wafers with reduced likelihood of damage to the wafer. Such an advantage results, in one embodiment, from disposing coin stacks of wafers in a vertical orientation within a shipping box, which addresses undesired bending of the wafers that is likely to occur when the wafers are disposed horizontally. This results in more reliable wafers.

Other technical advantages may be readily ascertainable by one of skill in the art.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the invention, and for further features and advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a schematic diagram illustrating a system and method for shipping wafers in which the wafers are oriented horizontally;

FIG. 2A is a schematic diagram illustrating a system and method for shipping wafers in which the wafers are oriented vertically;

FIG. 2B is a flowchart illustrating a method for shipping wafers;

FIG. 3A is a cross sectional drawing of the coin stack of FIG. 2A illustrating additional details of the coin stack of FIG. 2;

FIG. 3B is a cross sectional drawing of the coin stack of FIG. 2A showing an exploded view of portions of FIG. 3A; and

FIG. 3C is an end view of a separator of the coin stack of FIG. 2A.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS OF THE INVENTION

Embodiments of the invention and its advantages are best understood by referring to FIGS. 1 through 3C of the drawings, like numerals being used for like and corresponding parts of the various drawings.

FIG. 1 is a schematic diagram illustrating a system and method for shipping wafers. In this system, a shipping box 10 is packed with a plurality of coin stacks 12. Each coin stack 12 includes a coin stack carrier 14, which includes a plurality of wafers 16 separated by corresponding separators 18. A first protection layer 22 and a second protection layer 24 made of foam or other protective material may be utilized for additional protection; however, as used herein “coin stack” refers to a container having at least two wafers separated by a separator (whether or not ring-shaped). Separators 18 are used to reduce damage to wafers 16 that may occur due to movement within coin stack carrier 14 while being shipped in shipping box 10, as described in greater detail in co-pending application entitled “Protective Interleaf for Stacked Wafer Shipping,” having a Serial Number of 10/417,499, filed Apr. 17, 2003, which is incorporated herein by reference for all purposes. First protection layer 22 and second protection layer 24 may be made of foam to provide protection to wafers 16 both from contact with the walls of coin stack carrier 14 as well as damage from external forces.

Damage may occur to wafers 16 rubbing against adjacent wafers or separators 18. Typically, each coin stack 12 is disposed in shipping box 10 in a horizontal fashion such that wafers 16 are stacked on top of each other as opposed to oriented vertically, as illustrated. Conventionally, separators were used between adjacent wafers to reduce wear on a protective overcoat on the wafers. More recently, particular separators have been invented to protect metallization features on the wafers extending beyond the protective overcoat. An example of such separators is also described in co-pending application entitled “Protective Interleaf for Stacked Wafer Shipping,” having a Ser. No. 10/417,499, filed Apr. 17, 2003. As described in that application, a ring-shaped separator 18 (shown best in FIG. 3C) provides advantages in reducing damages to wafers 16 at least because it reduces contact between wafers 16 and separator 18, as compared to separators that are solid and would contact wafers 16 at locating other than merely near the wafer's perimeter.

The teachings of the present invention recognize, however, that the use of such a ring-shaped separator 18 (or similarly-shaped separators) can result in damage to wafers 16 when coin stacks 12 are stored or shipped in a horizontal fashion, such as is illustrated in FIG. 1. In particular, the teachings of the invention recognize that due at least in part to bending of the wafers 16 under the force of gravity, which is typically greatest at the center of the wafer because the ring-shaped separator 18 is disposed near the perimeter of wafer 16, adjacent wafers 16 may nevertheless contact each other. This contact can cause damage to components of wafers 16, such as bond pads or solder bumps. Similar damage can also be seen even when separators that are not ring-shaped are used. Additionally, sagging of wafers 16 may result in possible breakage of wafers 16. According to the teachings of the invention, instead of disposing coin stacks in a horizontal configuration as illustrated in FIG. 1, coin stacks are disposed in a shipping box 26 in a vertical manner such that wafers 16 are oriented “side by side,” as illustrated in FIG. 2A.

This approach cuts against conventional wisdom, as heretofore coin stacks having been utilized and oriented in a horizontal configuration at least in part to address mechanical edge damage concerns that may result from disposing wafers vertically. The teachings of the invention recognize; however, that although coin stacks have been designed and used for the explicit purpose of horizontal shipping, that an improved shipping technique can benefit from the use of coin stacks in a vertical configuration. The teachings of the invention further recognize that the use of a ring-shaped separator, which can be effective, nevertheless may result in damage due to bending of the wafers, which are not supported at their center when stacked horizontally, and that this problem may be addressed through vertical stacking.

FIG. 2A is a schematic diagram illustrating a system and method for shipping wafers according to the teachings of the invention, and FIG. 2B is a flow chart illustrating the method. The method of the present invention may involve coin stack 12, coin stack carrier 14, wafers 16, separators 18, first protection layer 22, and bottom protection layer 24, each described above in conjunction with FIG. 1. At step 102 the method begins. At step 104 a plurality of coin stacks 12 including at least a plurality of wafers 16 with separators 18 disposed in between are provided. As described above, coin stacks 12 may also include protection layers 22 and 24, in one embodiment. At step 106, coin stacks 12 are oriented in a substantially vertical direction within a shipping box 26 such that wafers 16 are disposed substantially vertically as opposed to substantially horizontal, as in FIG. 1 a. As used herein, “vertical” is used with reference to the direction of gravity. In one embodiment shipping box 26 includes a visual indicia 28 of in which orientation shipping box 26 should be maintained is provided. In this example, an arrow is utilized for visual indicia 28; however, other suitable visual indicators may be used, including writing. At a step 108, shipping box 26 may be shipped while maintaining its includes wafers 16 is a vertical orientation. Thus, by orienting coin stacks 12 vertically within shipping box 10, damage to wafers 16 may be reduced while shipping.

FIGS. 3A-3C illustrate additional details of an example coin stack 12 and in particular an example wafer separator 18; however, other types of wafer separators may be utilized, including separators that are not ring-shaped. FIG. 3A is a cross-sectional drawing of coin stack 12, and FIG. 3B is an enlarged view of a portion of coin stack 12. Additional details of this example are described in the above-identified co-pending application. Separators 18 may be made, in one embodiment, from semi-rigid antistatic plastic material, such as a conductive polypropylene; however, other materials may also be used, including other conductive plastics. Referring to FIG. 3B, separator 18 has a first surface 40. A first recessed portion 42 is formed in separator 18. As shown in FIG. 3C, the first recessed portion 42 has an outer perimeter shape corresponding to an outer perimeter shape of the wafers 16 it is adapted to retain. Wafers 16 often have a round outer perimeter shape with one or more flat portions or notches. The outer perimeter shape of separator 18 is round in this case, which matches the interior shape of the coin stack package 20. However, the interior shape of the coin stack carrier 12 and/or the outer perimeter shape of the separator 18 may have any of a variety of shapes, including (but not limited to): round, rounded, square, rectangular, hexagonal, or octagonal, for example. The outer perimeter shape of the separator 18 need not correspond to the outer perimeter shape of the first recessed portion. As described above, the use of a separator 18 that contacts wafer 16 near its perimeter but not near the center of wafer 16 may result in bending of wafer 16 when disposed horizontally. This bend may result in damage to wafers 16 due to adjacent wafers contacting each other. But when disposed vertically, such damage is less likely to occur.

Additional details of one example separator 18 are described below; however, any suitable separator 18 may be used that reduces contact between adjacent wafers. As shown in FIG. 3B, the first recessed portion 42 has a first depth 44 from the first surface 40. The thickness of this first depth 44 may vary. In the embodiment shown in FIG. 3B, the first depth 44 is less than a thickness of the wafer 16. In other embodiments the first depth 44 may be equal to or greater than the thickness of a wafer 16 retained therein. The transition between the first surface 40 and the first recessed portion 42 has a chamfer 46, in the illustrated embodiment. Chamber 46 has an angle of about seventy-five degrees relative to the first surface 40 of the separator 18, in one embodiment; however, the chamfer 46 may have any angle relative to the first surface 40 in other embodiments. In some embodiments the outer perimeter of the first recessed portion 42 may be larger than the outer diameter of a wafer 16 therein to account for manufacturing tolerances of wafers 16 and separators 18, and to prevent wafers 16 sticking in the separators 18 or breaking due to stresses imparted on wafer 16. Wafers 16 may be free to move slightly within the bounds of the first recessed portion 42 with a predetermined clearance.

As shown in FIG. 3B, a second recessed portion 48 is formed in separator 18 within the first recessed portion 42. The second recessed portion 48 has a second surface 50 located at a second depth 52 from first surface 40 of separator 18. The second depth 52 is greater than the first depth 44. For a given wafer design, there is typically a maximum height specification for the interconnection conductor materials 34 (solder bumps in this example) extending therefrom. Usually, the solder bumps 34 are all approximately the same height. The second depth 52 minus the first depth 44 is greater than the maximum height 54 of the solder bumps 34. Hence, the second recessed portion 48 provides clearance 55 between the bottom surface 50 of the second recessed portion 48 and the bumps 34 so that preferably the bumps 34 do not contact anything during shipping and handling. The radial width 56 of the first recessed portion 42 is also designed to provide a radial clearance 58 between the first recessed portion 42 and the bumps 34. The radial width 56 and the radial clearance 58 may vary for different embodiments.

Referring to FIG. 3C, note the outer perimeter shape of the first recessed portion 42 has a round shape, in this embodiment, even though most wafers 16 are round with one or more flat sides or notch(es). In other embodiments, the first recessed portion 42 may have exactly the same shape as a given wafer 32 (e.g., round with a flat side). Also, in other embodiments the first recessed portion 42 may have a notch or portion (not shown) extending radially beyond the major outer perimeter shape of the first recessed portion 42 for allowing access to an outer edge of wafer 16 while it is within the first recessed portion 42. Second recessed portion 48 is completely within the first recessed portion 42, in one embodiment; however, in other embodiments (not shown), the second recessed portion 48 may have portions extending radially outside of the first recessed portion 42, for example.

Although the present invention has been described in detail, it should be understood that the various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claim. 

1. A method for shipping semiconductor wafers each having metallization subject to damage comprising: providing a plurality of coin stacks, each coin stack comprising a plurality of semiconductor wafers separated from adjacent wafers by a ring-shaped wafer separator formed from plastic and disposed within a coin stack carrier, each semiconductor wafer having a plurality of interconnection conductor material portions, each coin stack further comprising first and second protection barriers formed from foam; and positioning each of the plurality of coin stack carriers in a shipping box such that each of the wafers in each of the coin stack carriers has a vertical orientation, the shipping box having a vertical arrow disposed thereon to indicate the orientation the shipping box should be maintained to maintain the wafers in a vertical orientation.
 2. The method of claim 1, wherein the plurality of interconnection conductor material portions comprise a plurality of solder bumps.
 3. The method of claim 1, wherein the plurality of interconnection conductor material portions comprise a plurality of flip chip bumps.
 4. The method of claim 1, wherein the plurality of interconnection conductor material portions comprise a plurality of bond pads.
 5. The method of claim 2, wherein the wafer separator comprises: a first surface; a first recessed portion formed in the wafer separator, the first recessed portion having an outer perimeter shape corresponding to an outer perimeter shape of the wafers, and the first recessed portion having a first depth from the first surface; and a second recessed portion formed in the wafer separator and located at least partially within the first recessed portion, the second recessed portion having a bottom surface at a second depth from the first surface, wherein the second depth is greater than the first depth.
 6. A method for shipping semiconductor wafers comprising: providing a plurality of coin stacks, each coin stack comprising a plurality of semiconductor wafers each separated from an adjacent wafer by a wafer separator and also including first and second protection barriers disposed at opposite ends of the coin stack; positioning each of the plurality of coin stack carriers in a shipping box such that each of the wafers in each of the coin stack carriers has a vertical orientation; and providing visual indicia on the shipping box of the orientation in which the shipping box should be maintained to maintain the wafers in a vertical orientation.
 7. The method of claim 6, wherein the plurality of wafer separators are ring-shaped.
 8. The method of claim 6, wherein the first and second protection barriers are formed from foam.
 9. The method of claim 6, wherein the coin stack carrier is formed from plastic.
 10. The method of claim 6, wherein the visual indicia comprises an arrow pointing upwards.
 11. The method of claim 6, wherein each of the semiconductor wafers comprises a plurality of interconnection conductor material portions.
 12. The method of claim 11, wherein the plurality of interconnection conductor material portions comprise a plurality of solder bumps.
 13. The method of claim 11, wherein the plurality of interconnection conductor material portions comprise a plurality of flip chip bumps.
 14. The method of claim 11, wherein the plurality of interconnection conductor material portions comprise a plurality of bond pads.
 15. The method of claim 11, wherein the wafer separator comprises: a first surface; a first recessed portion formed in the wafer separator, the first recessed portion having an outer perimeter shape corresponding to an outer perimeter shape of the wafers, and the first recessed portion having a first depth from the first surface; and a second recessed portion formed in the wafer separator and located at least partially within the first recessed portion, the second recessed portion having a second surface at a second depth from the first surface, wherein the second depth is greater than the first depth, and wherein the second depth minus the first depth is greater than a maximum height of the interconnection conductor material portions.
 16. The method of claim 6, wherein the visual indication comprises writing.
 17. An apparatus comprising: a plurality of coin stacks each comprising a plurality of semiconductor wafers disposed within a coin stack carrier, each coin stack comprising a plurality of semiconductor wafers separated from an adjacent wafer by a wafer separator; and a shipping box having the plurality of coin stacks disposed therein such that each of the wafers in each of the coin stack carriers has a vertical orientation.
 18. The apparatus of claim 17, wherein the shipping box comprises visual indicia formed therein of the orientation in which the shipping box should be maintained to maintain the wafers in a vertical orientation.
 19. The apparatus of claim 17, wherein the visual indicia comprises an arrow pointing upwards.
 20. The apparatus of claim 17, wherein each of the semiconductor wafers comprises a plurality of flip chip bumps. 